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Towards real-time neuromorphic radar processing on Loihi 2

Jul 2026 · Neuromorphic Computing and Engineering · Vol 6, pp. 034005 · 0 citations · 27 references
Physics

TL;DR

This work implements key stages of the conventional radar pipeline, including Fourier transforms, non-coherent integration, and constant false-alarm rate detection, using spiking neural networks operating directly on streaming sensor data and demonstrates real-time operation for selected on-chip configurations and latency, throughput, and dynamic power across different system scales and data transfer modes.

Abstract

Automotive radar signal processing is supported by highly specialized hardware and software, yet rapidly increasing sensor bandwidths and antenna counts are driving growth in data rates and energy consumption that challenge existing architectures. Neuromorphic processors offer an alternative computational paradigm based on sparse, event-driven dynamics, but their suitability for real radar sensor setups remains largely unexplored. Here we present an experimental neuromorphic radar processing pipeline operating on real radar sensor data and executing on Intel’s Loihi 2. To our knowledge, this is the first Loihi 2-based radar processing pipeline demonstrated in a vehicle-mounted automotive radar setup. We implement key stages of the conventional radar pipeline, including Fourier transforms, non-coherent integration, and constant false-alarm rate detection, using spiking neural networks operating directly on streaming sensor data. By adapting the underlying radar algorithms to the constraints of neuromorphic hardware, we demonstrate real-time operation for selected on-chip configurations and characterize latency, throughput, and dynamic power across different system scales and data transfer modes. Our results show that low-level radar processing can be realized on neuromorphic hardware under realistic sensor conditions, while also identifying important bottlenecks in host transfers, routing, and digital implementation efficiency. At the same time, the experiments demonstrate that neuromorphic architectures can sustain low-latency on-chip processing and scalable multi-channel execution. These findings provide a concrete reference point for future work on more tightly integrated neuromorphic radar systems and on higher-level radar processing stages where event-driven computation may offer additional advantages.

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