SoTTEE: A SoC-Architecture Agnostic Trusted Execution Environment Leveraging Bi-Level Isolation for FPGA platforms.

Abstract

Over the past two decades, the complexity of electronic components has significantly increased leading to the widespread adoption of heterogeneous System-on-Chip (SoC) architectures. These SoCs integrate various processing units, such as CPUs, GPUs, and specialized accelerators, to enhance performance and efficiency. However, this integration introduces vulnerabilities, necessitating robust security measures. A popular approach to enhance security in SoCs is the use of Trusted Execution Environments (TEEs). TEEs provide an isolated environment where sensitive tasks are protected from the main operating system and other potential threats. This paper presents SoTTEE, an architecture for TEE that has been developed for use in FPGA-only platforms which do not include ASIC-implemented cores and third-party security mechanisms. SoTTEE is not dependent on the SoC's architecture, Instruction Set Architecture (ISA) or any specific IP mechanism. It leverages SoC heterogeneity to provide strong physical isolation. SoTTEE introduces a bi-level isolation, combining a hardware-based Source of Trust (SoT) with flexible software sanctuaries for enhanced security. We propose a proof of concept implementing the hardware components of SoTTEE to evaluate the performance and pertinence of our architecture.