2026· International Conference on Security and Cryptography· pp. 661-666· 0 citations· 12 references
Computer Science
TL;DR
A systematic performance comparison between homomorphic encryption (HE) and hybrid homomorphic encryption (HHE) on embedded edge hardware and a decision framework for selecting HHE or HE based on data characteristics and operational requirements is developed.
Abstract
: To support privacy-preserving computation in resource-constrained environments, this paper presents a systematic performance comparison between homomorphic encryption (HE) and hybrid homomorphic encryption (HHE) on embedded edge hardware. While HE enables computations on encrypted data without decryption, its practical implementation remains challenging due to extensive computational and memory requirements. HHE alleviates this burden by having the client encrypt data with the lightweight symmetric cipher instead, while the data processor (server) handles the intensive transciphering into homomorphic format. We investigate the performance trade-offs between direct encryption with the homomorphic encryption scheme TFHE and a hybrid approach combining the Kreyvium stream cipher with TFHE. Testing on Raspberry Pi hardware shows HHE’s client-side advantages: Kreyvium’s pure encryption time is two times faster than TFHE, and it requires only 0.02% of its RAM. This efficiency comes at the cost of increased server-side processing during transciphering, shifting the computational burden from encryptors (clients) to data processors (servers). Based on measurements across different hardware configurations, we develop a decision framework for selecting HHE or HE based on data characteristics and operational requirements.
Hybrid homomorphic encryption (HHE) combines specialized symmetric ciphers with homomorphic encryption to reduce ciphertext expansion and client cost. For highest throughput/energy for edge deployments, we present Presto, the first FPGA accelerators for the two known CKKS-targeting HHE ciphers, HERA and Rubato. Presto...
Yeonsoo Jeon, Lewis Liu, M. Erez et al.· International Symposium on L...· 2 citations
S2MM is presented, the first scalable FPGA-based accelerator designed for HE MM, and a novel datapath for Homomorphic Linear Transformation (HLT), the dominant workload in HE MM is proposed, enabling fine-grained on-chip data reuse and substantially reducing both off-chip memory traffic and on-chip memory demand.
Zhi-Han Xu, Rajgopal Kannan, Viktor K. Prasanna· ACM Transactions on Reconfig...· 0 citations
The proposed three-layer framework is the first to combine word-level alphanumeric obfuscation, matrix scrambling and XOR masking into a single seed/key pipeline evaluated jointly on security, latency and storage cost, rather than treating obfuscation and encryption as separate design problems.
B. Fathimamary, J. Rexy, R. Geetha· Indian Journal of Science an...· 0 citations